Variation-Tolerant Digital Circuit Design for Printed/Flexible Electronics

Title: Variation-Tolerant Digital Circuit Design for Printed/Flexible Electronics Author: Joseph Chang, Tong Ge, Tong Lin Affiliation: Nanyang Technological University, Singapore Abstract: In this paper, we will discuss the commonality between ultra-deep subthreshold and printed TFTs in terms of their variations. We describe the application of the esoteric asynchronous-logic Quasi-Delay-Insensitive (QDI) signaling protocol to design digital circuits that innately accommodate intractable delay characteristics, i.e., error-free operation despite intractable variations. To mitigate the hardware, power and timing overheads of QDI, we will present our proposed modified signaling protocol named Pseudo-QDI and our proposed Pre-Charged-Static-Logic design style.